Ben Lippmeier
Contact
Department of Computer Science
Room N312, CSIT Building 108
Australian National University
Canberra, ACT 0200
Australia
Email:   Ben.Lippmeier (wibble) anu.edu.au
Projects
DDC - The Disciplined Disciple Compiler
Disciple is an explicitly lazy dialect of Haskell. DDC uses effect and closure analysis to allow
destructive update and arbitrary side-effects to play nicely with laziness and compiler optimisations.
It also supports real (object.field) type-directed projections, try-catch exceptions and some other
novel features. Update data without state monads in a real functional language, and learn to live again.
(project page)
ANUPlot
ANUPlot hides the pain of drawing simple 2D graphics in Haskell behind a nice data structure and a couple of
display functions. Used in 1st year CompSci here at ANU. The library uses the GHC OpenGL binding,
but you don't have to. No IORefs required in user code! 6 coats of gloss!
(project page)
(darcs repo)
Collar Weights
Code and switching hardware for the Collar Weights mixed media installation.
Inside each of the collars are electroluminescent lamps that are programmed
to switch on, illuminating texts that become visible through the fabric.
Phrases from interviews with the owners of the collars are played. With Alexandra Gillespie and Somaya Langley.
(Alex's photostream)
NoZork - A simple text adventure
A simple text adventure game written in Haskell. Playable over the network in multiple instances,
but not yet multi-player. Designed as something to be extended for a
1st year CompSci assignment.
(project page)
AMPLE - An Abstract Machine for Parallel Lazy Evaluation
An experimental environment that can be used to study the behavior of parallel
functional programs in terms of an abstract machine, without needing to
worry about details specific to a native implementation. Can
execute programs fully speculatively to determine to determine the maximum
embodied parallelism in a piece of code.
(project page)
full-speculation
with par/seq
Sunshine II RISC CPU Simulator
A simulator for a classic 5 stage pipelined RISC processor. Visualisation of pipeline
stalls, calculation of cpi, single step mode, breakpoints, instruction counts,
memory mapped file and console IO. Pipeline setup is easy to change.
(darcs repo)
Teaching